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authorPhilipp Gesang <phg@phi-gamma.net>2018-11-03 19:58:42 +0100
committerPhilipp Gesang <phg@phi-gamma.net>2018-11-03 20:23:23 +0100
commit55f50ddaf31fe1cb4cda4d15e387280e8f7a8242 (patch)
tree45b2ad303bc8a925aabc43f1910e0565db410f90 /sid.mli
parent2a999d7988d886b5e887988c68095addbbf9a794 (diff)
downloadocaml-sid-55f50ddaf31fe1cb4cda4d15e387280e8f7a8242.tar.gz
sid: add channel handlers for binary representation
Diffstat (limited to 'sid.mli')
-rw-r--r--sid.mli12
1 files changed, 12 insertions, 0 deletions
diff --git a/sid.mli b/sid.mli
index e9b5c78..0a9fbd8 100644
--- a/sid.mli
+++ b/sid.mli
@@ -40,12 +40,24 @@ module StringFmt :
module PacketRep :
sig
type endian = Big | Little
+ (** Specify the endianness when internalizing integers. Only relevant for
+ subauthorities as the identifier authority is specified as big endian.
+ The default is always [Little]. *)
+
val decode : ?endian:endian -> bytes -> (t, string) result
(** [decode endian b] decode the byte buffer [b] as a SID. *)
val encode : ?endian:endian -> t -> bytes
(** [encode endian s] convert SID [s] to the packet representation
encoding subauthorities in endianness [endian]. *)
+
+ val from_channel : ?endian:endian -> in_channel -> (t, string) result
+ (** [from_channel endian ic] read binary SID from [ic] with endianness
+ [endian]. *)
+
+ val to_channel : ?endian:endian -> out_channel -> t -> unit
+ (** [to_channel endian oc s] write SID [s] in packet representation
+ to channel [oc] with endianness [endian]. *)
end
(** Pre-defined SID constansts and constructors with fixed identifier